This invention relates, in general, to digital data shifters, and more particularly, to a versatile programmable multi-bit shifter for shifting digital data in a parallel format.
In the processing of digital data and especially in digital computers it is often desirable to shift or to rotate the digital data. In the past, medium scale integration (MSI) integrated circuit chips have been used to perform these functions. However, most of these prior art MSI chips only had the capability of performing one or two functions such as a shift right or shift right and rotate function. In order to perform some of the other desirable functions, the chips had to be combined in an array. As a result, the processing time of the data was increased and in addition redundant circuitry had to used, thereby increasing the cost of the circuitry used for shifting. By now, it should be recognized that it would be desirable to solve the above and other problems.
Accordingly, it is an object of the present invention to provide an improved digital data shifter.
Another object of the present invention is to provide a programmable multi-bit shifter capable of performing arithmetic shift right and left, rotate right and left, two's complement right and left, sign extend, and output disable operations.
Yet another object of the present invention is to provide an improved programmable multi-bit shifter capable of functioning with positive or negative logic.
A further object of the present invention is to provide a multi-bit shifter having reduced parts count and high-speed implementation with greater flexibility.